What is the difference between level triggered logic and edge triggered logic? Which do we use? Why?

What will be an ideal response?

In level triggered logic, register contents change state from current to new when the clock signal is high. In edge triggered logic, the register contents change state on the rising or falling edge of the clock. In edge triggered logic, if the change happens on the rising edge it is referred to as positive edge triggered logic; as opposed to change happening on the falling edge, which is referred to as negative edge triggered logic.

We use positive edge triggered logic.

Edge triggered logic is a method which avoids certain instability problems which are found in level triggered circuits