What is register renaming and why is it used in superscalar processors?

What will be an ideal response?

The assembly language source code executed by processors uses registers and memory locations to store data. The number of registers is limited by the available silicon real estate (not really a problem today) and the number of address bits in an instruction assigned to register naming (the real limitation). For example, the ARM has four bits permitting 16 registers, whereas MIPS has five bits permitting 32 registers. Because there are so few registers, all but the most trivial programs will use the same registers over and over again, each time in a different role. Consider

1. A = B + C ADD r0,r1,r2
2. D = A * F MUL r3,r0,r4
3. P = Q + 3 ADD r5,r6,#3
4. A = B ? Y SUB r0,r1,r7

Note that instructions 1 and 4 use the variable A which is stored in register r0. Now, variable A is created in line 1 and used in line 2. In line 4 it is clear that A is a new variable or is the same variable being reused. Here we have a write?after?write, WAW, dependency. It is a false dependency. However, the processor has to be careful not to execute line 4 before line 1. Renaming registers solves this problem by generating the code
1. A = B + C ADD r0,r1,r2
2. D = A * F MUL r3,r0,r4
3. P = Q + 3 ADD r5,r6,#3
4. A = B ? Y SUB rr0,r1,r7

The two instances of A have different names and the false WAW dependency has been removed. Register renaming requires a pool of registers plus a means of assigning new registers to those in instructions and then a means of reclaiming registers when existing instructions are retired.