In a processor with a five stage pipeline as discussed in the class and shown in the picture below (with buffers between the stages), explain the problem posed by branch instruction. Present a solution.

What will be an ideal response?

The problem presented by a branch instruction is that as it moves into the decode stage the fetch stage does not yet know whether to fetch the next instruction or the branch target instruction.
Without other changes this requires the pipeline to stall until it has the result of the branch comparison.
Possible solution to ameliorate this problem:
a.) Perform the comparison in the decode stage.
b.) Change policy to unconditionally execute the instruction following the branch regardless of the outcome of the branch.
c.) Install a branch predictor which will perhaps record the previous results of a branch and predict the same outcome. Due to the nature of loops this should have a very high success rate.
d.) Install a BTB as discussed in question 11.