A superscalar processor can be best thought of as a pipelined processor where the pipeline is replicated; for example, a 4?way superscalar processor has four parallel pipelines allowing four instructions to be executed in parallel. True or false – and why?

What will be an ideal response?

In general, the answer is … false because this statement is not true. It would be possible to construct a
superscalar from four parallel pipelines, but it would not be a wise thing to do. Obvious problems arise
concerning access to the register files and the treatment of branches. Another problem would be how
instructions are entered into the pipeline; where is the checking for data dependencies?
A superscalar has some properties of the pipelined processor in the sense that information flows through a
pipeline. However, the superscalar pipeline has stages that process groups of instructions in parallel (e.g.,
choosing instructions for execution and checking data dependencies, or executing multiple instructions using
parallel execution units.