Similarly, in a write cycle the latch would capture a 16?bit word from the CPU and then provide two consecutive 8?bit writes to the memory.
What will be an ideal response?
The four banks are each 1,024/4 = 256 MB. The word size is 64 bits (8 bytes). CPU address lines A00, A01, A02 are not used (other than to perform byte
selection via byte strobes). The total memory is 1,024 MB and is spanned by address lines A00 to A29. Address lines A30 and A31 must be
decoded to select this memory block. The address lines are decoded as
The S bits select the memory system. The Z bits select a location in the memory. The Y bits select the block (interleaving), and the X bits are used to generate byte selection signals.
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Fill in the blank(s) with the appropriate word(s).
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Answer the following statement true (T) or false (F)