Answer the following statements true (T) or false (F)

1. An advantage of using a shared L2 cache on the chip is that data shared by multiple cores is not replicated at the shared cache level.
2. A potential advantage to having only dedicated L2 caches on the chip is that each core enjoys more rapid access to its private L2 cache.
3. The big.Little architecture uses a combination of ARM Cortex-A7 and Cortex A-15 cores.
4. The generic timer handles interrupt detection and interrupt prioritization.
5. Direct data intervention enables copying clean data from one CPU L1 data cache to another CPU L1 data cache without accessing external memory.

1. True
2. True
3. True
4. False
5. True